Wiring the Fetch Unit ##################### .. include:: /header.inc .. vim:filetype=rst spell: So far, all we have done is build a bunch of basic parts, and test them to make sure they work properly. It is time to put together our machine and see it in action. There will be several major parts to our final machine: * Circuit - the wired together collection of parts * Controller - the part of our system in charge of all the actions * GUI - we want visual gadgets we can control with this system * Application - the part that ties everything together. We will start off by wiring up the Fetch Unit. As we studied, this unit needs a few of the parts in our inventory: * Multiplexor * Program Counter Register * Instruction Memory Unit Hopefully, you have all of these in your ``lib`` folder, ready to run. We need a few wires to hook things up. Just as a review, here is the first part of the machine we want to build: .. circuits:: :width: 450 :align: center \newcommand{\pin}[3]{ % {coord}{color}{label} \begin{scope}[shift={(#1)}] \draw [fill=#2!30] (0.000000,0.000000) -- (0.250000,0.000000) -- (0.250000,0.250000) -- (0.000000,0.250000) -- cycle; \node at (0.125,0.125) {\tiny{#3}}; \end{scope} } \newcommand{\ctrlx}[3]{% {coord}{color}{label} \begin{scope}[shift={(#1)}] \draw [fill=#2!30] (0,0) -- (0.125,0.0) -- (0.125,-0.75) -- (-0.125,-0.75) -- (-0.125,0) -- cycle; \node at (0,-0.1) {\tiny{#3}}; \end{scope} } \newcommand{\ctrl}[3]{% {coord}{color}{label} \begin{scope}[shift={(#1)}] \draw [fill=#2!30] (0.000000,0.000000) -- (0.175,0.175) -- (0.1750000,0.5250) -- (-0.1750000,0.5250000) -- (-0.175000,0.175) -- cycle; \node at (0,0.35) {\tiny{#3}}; \end{scope} } \newcommand{\tick}[1]{% tick marker \begin{scope}[shift={(#1)}] \draw[fill=red!30] (0,0) -- (0.125,0.125) -- (0.25,0) -- cycle; \end{scope} } %----------------------------------------------------------------------------- % Fetch Unit \draw [ultra thick] (0,0) -- (0,7) -- (11,7) -- (11,0) -- cycle; \pin{-.25,2.375}{blue}{1} \pin{11,1.375}{yellow}{2} \pin{11,2.375}{yellow}{3} \pin{11,4.125}{yellow}{4} \pin{5.375,7}{blue}{5} \draw (5.5,6) -- (5.5, 7); % Multiplexor \begin{scope}[shift={(2,1)}] \pin{1,0.875}{yellow}{3} \pin{-0.25,0.375}{blue}{2} \pin{-0.25,1.375}{blue}{1} \ctrlx{0.5,2.125}{red}{3} \draw [fill=green!30] (0.000000,0) -- (1.000000,0.375) -- (1.000000,1.625) -- (0.000000,2) -- cycle; \node at (0.500000,1.00000) {mux}; \end{scope} \draw[ultra thick] (0,2.5) -- node[above] {PCnext} node [below] {w2}++ (1.75,0); \pin{0.25,1.375}{yellow}{0}; \draw [ultra thick] (0.5,1.5) -- node[above] {Reset} node [below] {w1} ++ (1.25,0); \draw (2.5,3.125) -- (2.5,6); % Program counter \begin{scope}[shift={(5.000000,0.500000)}] \pin{-0.25,1.375}{blue}{1}; \pin{1.00,1.375}{yellow}{2}; \pin{0.375,3}{red}{3}; \draw [fill=blue!30](0.000000,0.000000) -- (1.000000,0.000000) -- (1.000000,3.000000) -- (0.000000,3.000000) -- cycle; \node at (0.500000,1.500000) {pc}; \draw (0.5,3.25) -- (0.5,6); \end{scope} \draw [ultra thick] (3.25,2) -- node[above] {w3} ++ (1.5,0); \draw [ultra thick] (7,2) -- (7,4.25) -- (8.25,4.25); \draw [ultra thick] (8.75, 4.25) -- (11,4.25); % Instruction Memory \begin{scope}[shift={(8.000000,0.500000)}] \pin{-0.25,1.375}{blue}{1}; \pin{1.00,0.875}{yellow}{2}; \pin{1.00,1.875}{red}{3}; \pin{0.375,3}{red}{4}; \draw [fill=blue!30](0.000000,0.000000) -- (1.000000,0.000000) -- (1.000000,3.000000) -- (0.000000,3.000000) -- cycle; \node at (0.500000,1.500000) {im}; \draw (0.5,3.250) -- (0.5,4.5); \tick{0.375,0}; \end{scope} \draw [ultra thick] (6.25,2) -- node[below] {w4}++ (1.5,0); \draw [ultra thick] (9.25,1.5) -- node[below] {w5} ++ (1.75,0); \draw [ultra thick] (9.25,2.5) -- node[below] {w6} ++ (1.75,0); % Control Unit \begin{scope}[shift={(2,5)}] \draw [fill=red!30] (0,0) -- (7,0) -- (7,1) -- (0,1) -- cycle; \node at (3.500000,0.500000) {control}; \end{scope} In this diagram, the control unit has simple lines between that unit and the various components. Those are not wires, just function calls to that part's tick method. As you can see, we are basing this Fetch unit on a standard component, but the internal structure is more complicated than the simple parts we have constructed up to now. The idea here is to capture everything about the fetch stage in a single package, and partition the control function into a small chunk inside of this container. We will activate the "tick" function of this Fetch unit, and that inner control unit will sequence the steps for making this stage to its job. As we build this new component, we will add tests and hook it into our graphical system so we can see things happen. (But, with only this one part, thee is not much we can see. Still, it is a start!) Inputs ====== The input to this first block we will build is the next PC address to fetch, which is coming in from a previous instruction. We allow foe a reset signal to be delivered to the multiplexer, which will set the program counter to zero, the address where programs loaded into the IM will begin. That zero "signal" can be modeled by a single pin hanging out in space that is not part of any other component. We will set a value on that pin that is just a constant. No one will ever alter that pin's value. We will "tock" the wire from the pin to the multiplexor input, to get that constant value delivered to the multiplexor. Formally, we call this pin a "source". The control unit will need to decide if we use that zero, or the other incoming address. When we first run the processor, the multiplexor should be set to select the zero input. We may later send a reset signal to this stage so we can restart the program, if needed. Outputs ======= The outputs from the Fetch Unit are the two 16-bit values you fetch from the instruction memory, and the program counter, which will be updated in the decode unit. Inside the fetch unit, we need a multiplexor, the program counter register, and an Instruction memory unit. That is it. Just three parts, plus a spare pin, are needed to build this gadget. Control Signals =============== The control unit could be modeled as another component, but to keep things simple, we will just make that part a method in this new Fetch class. The control unit really does not have much work to do for this part of the machine. When we want to do a "fetch" we simply work through these steps: Here are the action a we need to make happen: 1. Call "tock" on ``w1`` and ``w2``. 1. Set the multiplexor select line as needed 2. Call "tick" on the multiplexor 3. Call "tock" on wire ``w3``. 4. Call "tick" on the PC register 5. Call "tock" on the wire ``w4``. 6. Call "tick" on the IM unit. 7. Call "tock" on wires ``w5`` and ``w6``. At the end of this sequence, the two 16-bit values should be available for delivery to the ``Decode Unit``. Also, the current value of instruction address (``PC``) will also be passed through, so we can update it during the decode stage. To make building each stage easier, let's break up the control unit into segments dedicated to each stage. By doing this, we can include the control logic in a class we will build for each stage. Let's try this idea out: Fetch Unit Class **************** The management class for the fetch stage will be derived from our standard Component class, but the ``tick`` method here will actually be where we do the control logic. Here is your class specification, in the required header file: .. literalinclude:: code/fetch/Fetch.h :linenos: :caption: include/Fetch.h This class provides a new method, we will call ``build``. That method is where we assemble the parts. That method is private, and will be called as part of the class constructor. .. note:: We will create only one of these units, and it will be part of the full machine we will assemble. We set the outer structure of this unit up as usual: .. literalinclude:: code/fetch/Fetch1.cpp :linenos: :caption: lib/Fetch.cpp Building the Circuit ******************** The hard part of this is assembling all the parts with a few wires. Here is a summary of what we need: .. csv-table:: :header: Part, Inputs, Outputs, Signals Pin1, None, Constant zero, None Wire, Pin1, MUX IN2, None MUX, Wire.Drives, Fetch.in